1. Technical Field
The present invention relates in general to a system and method for grouping processors. More particularly, the present invention relates to a system and method for assigning one or more processors and memory space to a group whereby an application uses the group to perform a task.
2. Description of the Related Art
Computer systems are becoming more and more complex. The computer industry typically doubles the performance of a computer system every 18 months (i.e. personal computer, PDA, gaming console). In order for the computer industry to accomplish this task, the semiconductor industry produces integrated circuits that double in performance every 18 months. A computer system uses integrated circuits for particular functions based upon the integrated circuits' architecture. Two fundamental architectures are 1) a microprocessor-based architecture and 2) a digital signal processor-based architecture.
An integrated circuit with a microprocessor-based architecture is typically used to handle control operations whereas an integrated circuit with a digital signal processor-based architecture is typically designed to handle signal processing manipulations (i.e. mathematical operations). As technology evolves, the computer industry and the semiconductor industry realize the importance of using both architectures, or processor types, in a computer system design.
Software is another element in a computer system that has been evolving alongside integrated circuit evolution. A software developer writes code in a manner that corresponds to the processor type that executes the code. For example, a processor has a particular number of registers and a particular number of arithmetic logic units (ALUs) whereby the software developer designs his code to most effectively use the registers and the ALUs.
An operating system provides an application with execution threads to perform various tasks. In a multi— processor environment, an application may use multiple execution threads to perform a task using multiple processors. A challenge found, however, is guaranteeing latencies between corresponding execution threads that are scheduled on different processors. For example, corresponding threads may be responsible for participating in shared memory synchronization operations (i.e. locks, barriers, etc.) whereby a first thread stalls because it is waiting for a second thread to load on one of the processors. Furthermore, a challenge found in multiple processor environments is managing events for corresponding threads. For example, if two threads each generate an event, their corresponding application is required to identify which thread generated the first event.
What is needed, therefore, is a system and method for managing a plurality of resources so that the resources are allocated with minimal effort when an application requires the resources.